Keyphrases
Acceptable Error
50%
Acoustic Waves
50%
Active Noise Control
100%
Active Noise Control System
50%
Artix-7 FPGA
50%
Coefficient Update
50%
Computational Cost
50%
Control Method
50%
Control Signal
50%
Error Signal
50%
Fast Simulation
50%
Filter Coefficients
100%
Filtered-x Least Mean Square Algorithm
100%
FIR Filter
50%
FxLMS
50%
Hardware Design
50%
Hardware Efficiency
50%
Hardware Implementation
50%
Integer Arithmetic
50%
Latency
50%
Main Idea
50%
Microphone
50%
Output Control
50%
Parallel Architecture
100%
Parallel System
50%
Parallelizing
50%
Processing Time
50%
Reconfigurable Hardware
100%
Reference Microphone
50%
Reference Signal
50%
Scalable Implementation
50%
Software Implementation
50%
Sound Source
50%
Three-dimensional (3D)
50%
Xilinx
50%
INIS
algorithms
100%
architecture
100%
computer codes
33%
control
100%
control systems
33%
cost
33%
design
33%
errors
100%
filters
100%
firs
33%
implementation
100%
mhz range
33%
noise
100%
output
100%
processing
33%
signals
100%
sound waves
33%
Computer Science
Coefficient Update
50%
Computational Cost
50%
Computer Hardware
50%
Control Signal
50%
Field Programmable Gate Arrays
100%
Filter Coefficient
100%
Finite Impulse Response Filter
50%
Hardware Design
50%
Hardware Implementation
50%
least mean square algorithm
100%
Least-Mean-Square Algorithm
50%
Parallel Architectures
100%
Parallel System
50%
Processing Time
50%
Reconfigurable Hardware
100%
Reference Signal
50%
Software Implementation
50%
Engineering
Coefficient Update
33%
Computational Cost
33%
Control Signal
33%
Control Systems
33%
Error Signal
33%
Field Programmable Gate Arrays
66%
Filter Coefficient
66%
Finite Impulse Response Filter
33%
Least Mean Square
100%
Main Idea
33%
Processing Time
33%
Reconfigurable Hardware
100%
Reference Signal
33%
Sound Source
33%