Resumen
In this paper we study the drain voltage effect on
the threshold voltage extracted using the transconductance to
current ratio (g m/ID) and the g m/ID change (d(g m/ID)/dVG )
methods. We analyze and compare the power correction factor
(PEC) of these threshold voltage extraction methods using
numerical simulations of a generic long-channel MOSFET (0.35
μm CMOS process) with a parametric voltage sweep in the drain
voltage in a common source configuration. The numerical
simulations were carried out using MATLAB, and the MOSFET
model implemented is based on the Advanced Compact MOSFET
(ACM). It is shown that the correction procedure proposed for the
g m/ID method is more accurate than the correction procedure
proposed for the d(g m/ID)/dVG method.
the threshold voltage extracted using the transconductance to
current ratio (g m/ID) and the g m/ID change (d(g m/ID)/dVG )
methods. We analyze and compare the power correction factor
(PEC) of these threshold voltage extraction methods using
numerical simulations of a generic long-channel MOSFET (0.35
μm CMOS process) with a parametric voltage sweep in the drain
voltage in a common source configuration. The numerical
simulations were carried out using MATLAB, and the MOSFET
model implemented is based on the Advanced Compact MOSFET
(ACM). It is shown that the correction procedure proposed for the
g m/ID method is more accurate than the correction procedure
proposed for the d(g m/ID)/dVG method.
| Idioma original | Inglés |
|---|---|
| Título de la publicación alojada | Proceedings of the MICROELECTRONICS STUDENTS FORUM (SFORUM in Curitiba, Brazil) |
| Número de páginas | 4 |
| Estado | Publicada - 2013 |