TY - GEN
T1 - Remote logic analyzer implemented on FPGA
AU - García, Luisa
AU - González, Alejandra
AU - Moreno, Henry
AU - Jaquenod, Guillemo
PY - 2008
Y1 - 2008
N2 - This paper describes the development of a 32-channel, 150MHz bandwidth logic analyzer, implemented on an Altera Stratix II FPGA. This analyzer is remotely controlled through TCP/IP, allowing acquisition configuration and control, and data visualization via Internet, by means of a specific user interface.
AB - This paper describes the development of a 32-channel, 150MHz bandwidth logic analyzer, implemented on an Altera Stratix II FPGA. This analyzer is remotely controlled through TCP/IP, allowing acquisition configuration and control, and data visualization via Internet, by means of a specific user interface.
UR - http://www.scopus.com/inward/record.url?scp=56349143082&partnerID=8YFLogxK
M3 - Conference contribution
AN - SCOPUS:56349143082
SN - 9789876550031
T3 - Proceedings of the Argentine School of Micro-Nanoelectronics, Technology and Applications 2008, EAMTA
SP - 103
EP - 106
BT - Proceedings of the Argentine School of Micro-Nanoelectronics, Technology and Applications 2008, EAMTA
T2 - Argentine School of Micro-Nanoelectronics, Technology and Applications 2008, EAMTA
Y2 - 18 September 2008 through 19 September 2008
ER -