Keyphrases
Reconfigurable Hardware
100%
Parallel Architecture
100%
Active Noise Control
100%
Filtered-x Least Mean Square Algorithm
100%
Filter Coefficients
100%
Control Method
50%
Three-dimensional (3D)
50%
Computational Cost
50%
Processing Time
50%
Software Implementation
50%
Hardware Implementation
50%
Parallel System
50%
FxLMS
50%
Reference Signal
50%
Latency
50%
Hardware Design
50%
Control Signal
50%
Sound Source
50%
Main Idea
50%
Error Signal
50%
Parallelizing
50%
Acceptable Error
50%
Microphone
50%
Xilinx
50%
Output Control
50%
Scalable Implementation
50%
Hardware Efficiency
50%
FIR Filter
50%
Artix-7 FPGA
50%
Integer Arithmetic
50%
Active Noise Control System
50%
Acoustic Waves
50%
Reference Microphone
50%
Coefficient Update
50%
Fast Simulation
50%
INIS
architecture
100%
implementation
100%
signals
100%
control
100%
output
100%
algorithms
100%
noise
100%
errors
100%
filters
100%
design
33%
computer codes
33%
cost
33%
processing
33%
control systems
33%
mhz range
33%
firs
33%
sound waves
33%
Computer Science
Parallel Architectures
100%
least mean square algorithm
100%
Reconfigurable Hardware
100%
Filter Coefficient
100%
Field Programmable Gate Arrays
100%
Software Implementation
50%
Hardware Design
50%
Control Signal
50%
Parallel System
50%
Hardware Implementation
50%
Computational Cost
50%
Least-Mean-Square Algorithm
50%
Processing Time
50%
Coefficient Update
50%
Reference Signal
50%
Computer Hardware
50%
Finite Impulse Response Filter
50%
Engineering
Reconfigurable Hardware
100%
Least Mean Square
100%
Field Programmable Gate Arrays
66%
Filter Coefficient
66%
Control Systems
33%
Main Idea
33%
Reference Signal
33%
Sound Source
33%
Processing Time
33%
Control Signal
33%
Computational Cost
33%
Coefficient Update
33%
Error Signal
33%
Finite Impulse Response Filter
33%